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- W2099459040 abstract "We propose two schemes for implementing higher associativity: the sequential multi-column cache, which is an extension of the column associative cache, and the parallel multi-column cache. In order to achieve the same access cycle time as that of a direct-mapped cache, data memory in the cache is organized into one bank in both schemes. We use the multiple MRU block technique to increase the first hit ratio, thus reducing the average access time. While the parallel multi-column cache performs the tag checking in parallel, the sequential multi-column cache sequentially searches through places in a set, and uses index information to filter out unnecessary probes. In the case of an associativity of 4, they both achieve the low miss rate of a 4-way set-associative cache. Our simulation results using ATUM traces show that both schemes can effectively reduce the average access time." @default.
- W2099459040 created "2016-06-24" @default.
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- W2099459040 date "2002-11-22" @default.
- W2099459040 modified "2023-09-23" @default.
- W2099459040 title "Multi-column implementations for cache associativity" @default.
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- W2099459040 doi "https://doi.org/10.1109/iccd.1997.628915" @default.
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