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• W2100038543 abstract "An efficiency deterministic BIST scheme based on partial scan chains together with a scan selection algorithm tailored for BIST is presented. The algorithm determines a minimum number of flip-flops to be scannable so that the remaining circuit has a pipeline-like structure. Experiments show that scanning less flip-flops may even decrease the hardware overhead for the on-chip pattern generator besides the classical advantages of partial scan such as less impact on the system performance and less hardware overhead." @default.
• W2100038543 created "2016-06-24" @default.
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• W2100038543 date "2003-01-20" @default.
• W2100038543 modified "2023-09-26" @default.
• W2100038543 title "Deterministic BIST with partial scan" @default.
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• W2100038543 doi "https://doi.org/10.1109/etw.1999.804415" @default.
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