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• W2100043814 abstract "By using a high-temperature gate-first process, HfN--HfO/sub 2/-gated nMOSFET with 0.95-nm equivalent oxide thickness (EOT) was fabricated. The excellent device characteristics such as the sub-1-nm EOT, high electron effective mobility (peak value /spl sim/232 cm/sup 2//V/spl middot/s) and robust electrical stability under a positive constant voltage stress were achieved. These improved device performances achieved in the sub-1-nm HfN--HfO/sub 2/-gated nMOSFETs could be attributed to the low interfacial and bulk traps charge density of HfO/sub 2/ layer due to the 950/spl deg/C high-temperature source/drain activation annealing process after deposition of the HfN--HfO/sub 2/ gate stack." @default.
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• W2100043814 date "2005-04-01" @default.
• W2100043814 modified "2023-10-18" @default.
• W2100043814 title "Improved electrical and reliability Characteristics of HfN--HfO/sub 2/-gated nMOSFET with 0.95-nm EOT fabricated using a gate-first Process" @default.
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• W2100043814 doi "https://doi.org/10.1109/led.2005.845496" @default.
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