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- W2100091624 abstract "This paper develops a systematic method for the synthesis of electronic circuits which must realize symmetric Boolean functions. The ``fold-down'' method, originated by Shannon [1], solves the problem nicely for relay circuits. The electronic circuit, however, composed of ``and,'' ``or,'' and ``not'' elements, does not seem to incorporate the feature of symmetry as readily. It is shown that for symmetric functions a minimal-not condition exists, and that this form is a powerful tool for synthesis. The minimality is not actually proven, except for the case of fundamental symmetric functions. As with the minimal-or circuit, a minimal-not circuit does not necessarily imply the most economical realization, and the design procedure should take account of this fact." @default.
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- W2100091624 date "1958-03-01" @default.
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- W2100091624 title "Synthesis of Electronic Circuits for Symmetric Functions" @default.
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- W2100091624 doi "https://doi.org/10.1109/tec.1958.5222097" @default.
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