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- W2100094369 abstract "Latent interface trap build-up in MOS transistors is found to be governed by H/sub 2/ diffusion through the silicon substrate. The main source of H/sub 2/ is probably located on the back interface of the silicon wafer." @default.
- W2100094369 created "2016-06-24" @default.
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- W2100094369 date "2002-11-07" @default.
- W2100094369 modified "2023-10-05" @default.
- W2100094369 title "Backside chip effect on latent relaxation in irradiated MOS devices" @default.
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- W2100094369 doi "https://doi.org/10.1109/icmel.2000.840594" @default.
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