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- W2100566173 abstract "A new technique for realizing a very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal is presented. The fully differential double-sampled design relaxes the trade-off between sampling speed and the sampling precision. Simulation results are given to demonstrate the potential advantage of the new technique." @default.
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- W2100566173 date "2005-07-27" @default.
- W2100566173 modified "2023-09-23" @default.
- W2100566173 title "A Very-High-Speed Low-Power Low-Voltage Fully Differential CMOS Sample-and-Hold Circuit with Low Hold Pedestal" @default.
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- W2100566173 doi "https://doi.org/10.1109/iscas.2005.1465286" @default.
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