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- W2100767609 abstract "In modern circuits, interconnect efficiency is a central determinant of circuit efficiency. Moreover, as technology is scaled down, the importance of efficient interconnect design is increasing. In this paper, we explore an option for low-power interconnect synthesis at the 32 nm node and beyond, using fin-type field-effect transistors (FinFETs) which are a promising substitute for bulk CMOS at the considered gate lengths. We consider a previously-unexplored mechanism for improving FinFET efficiency, called threshold voltage control through multiple supply voltages (TCMS), which is significantly different from conventional multiple-supply voltage schemes. We develop a circuit design for a FinFET buffer using TCMS. We describe a variation of van Ginneken's classic dynamic programming framework for solving the problem of power-optimal TCMS buffer insertion on a given routing tree. We show that, on an average, TCMS can provide power savings of 50.41% and device area savings of 9.17% compared to a state-of-the-art dual-V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>dd</sub> interconnect synthesis scheme." @default.
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- W2100767609 date "2008-01-01" @default.
- W2100767609 modified "2023-09-27" @default.
- W2100767609 title "Threshold Voltage Control through Multiple Supply Voltages for Power-Efficient FinFET Interconnects" @default.
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- W2100767609 doi "https://doi.org/10.1109/vlsi.2008.117" @default.
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