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- W2101453707 abstract "This paper presents a capacitor mismatch calibration technique in multibit discrete-time sigma-delta (ΣΔ) modulators based on a capacitor error model, including nonideal integrator gain errors. This model enables the compensation of mismatch-induced nonlinear memory errors in conversion using a simple flnite impulse-response structure. Single-bit pseudorandom noise (PN) is utilized to identify the error coefficients, and an analog-domain PN removal technique is devised to minimize the input signal dynamic-range loss due to the PN circulation in the ΣΔ loop. The behavioral simulation demonstrates that the proposed scheme effectively compensates for the multibit capacitor mismatch errors in the first- and second-order ΣΔ modulators." @default.
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- W2101453707 date "2011-04-01" @default.
- W2101453707 modified "2023-09-25" @default.
- W2101453707 title "Digital Calibration of Capacitor Mismatch in Sigma-Delta Modulators" @default.
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- W2101453707 doi "https://doi.org/10.1109/tcsi.2010.2073870" @default.
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