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- W2103160613 abstract "On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction, timing of functional test, scan IO sharing, embedded memory built-in self-test (BIST), etc. The chip has been fabricated and tested successfully by our approach. Test results justify that short test integration cost, short test time, and small area overhead can be achieved. To support SOC testing, a memory BIST compiler and an SOC testing integration system have been developed." @default.
- W2103160613 created "2016-06-24" @default.
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- W2103160613 date "2005-04-01" @default.
- W2103160613 modified "2023-09-23" @default.
- W2103160613 title "SOC Testing Methodology and Practice" @default.
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- W2103160613 doi "https://doi.org/10.1109/date.2005.273" @default.
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