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• W2104884148 abstract "Key components and architecture options are being actively investigated to realize next generation transport technology in optical networks. Serial transmission systems using a single wavelength have, so far, provided cost effective solutions and therefore remain desirable. For 100 Gbit/s Ethernet, this option will, however, depend on the availability of the electronic and optical components. Due to its high speed and high breakdown voltage, the InP double-heterojunction bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This contribution describes our InP DHBT based integrated circuit (IC) technology developed for 100 Gbit/s class mixed-signal ICs. Using this technology, we fabricated and succeeded in 112 Gbit/s testing of key electronic components, including a multiplexer (MUX), a distributed amplifier, and an integrated clock and data recovery (CDR)/1:2 demultiplexer (DEMUX), with very clear eye waveforms. These high-speed building block ICs are described and the main results are presented." @default.
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• W2104884148 date "2011-10-01" @default.
• W2104884148 modified "2023-09-25" @default.
• W2104884148 title "Ultra-High-Speed Transmitter and Receiver ICs for 100 Gbit/s Ethernet Using InP DHBTs" @default.
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• W2104884148 doi "https://doi.org/10.1109/csics.2011.6062477" @default.
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