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- W2105487029 abstract "Challenges for current high end lithography systems are processing on top of buried and Chemical Mechanical Polishing layers. Wafer alignment is performed by complex multi-order trained alignment systems. An attractive alternative is emerging: back-side alignment. This allows for wafer alignment decoupled from processing of the device layers. The most recent back to back-side align (BTBA) overlay performance in resist is 18.3 nm achieved during a customer test at LSI logic with a scanner. The measured overlay results show good correspondence to those of a BTBA overlay calculation model. This allows identification of the main error contributors and further improvement of the BTBA overlay results. Back-side align performance compares well with front-side alignment strategies on a CMOS18 P-Well layer." @default.
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- W2105487029 date "2006-04-01" @default.
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- W2105487029 title "Back-side alignment strategy decouples process from alignment and achieves leading edge overlay performance" @default.
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- W2105487029 doi "https://doi.org/10.1016/j.mee.2006.01.209" @default.
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