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• W2105526107 abstract "Side channel attacks are known to be efficient techniques to retrieve secret data. Within this context, the scope of this paper is to evaluate, on and for FPGA, the robustness of triple rail logic against power analyses. More precisely, this paper aims at demonstrating that the basic concepts on which leans this logic are valid and may provide interesting design guidelines to obtain DPA (differential power analysis) resistant circuits." @default.
• W2105526107 created "2016-06-24" @default.
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• W2105526107 date "2008-12-01" @default.
• W2105526107 modified "2023-09-25" @default.
• W2105526107 title "Triple Rail Logic Robustness against DPA" @default.
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• W2105526107 doi "https://doi.org/10.1109/reconfig.2008.75" @default.
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