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- W2105758312 endingPage "1802" @default.
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- W2105758312 abstract "The problem of reducing the number of adders required to perform shift-and-add multiplication is addressed for hardware and software applications. Algorithms invented for each of these applications are compared and found to have similar performances in general. Improved results are achieved by selecting the best design of the two." @default.
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- W2105758312 date "1995-10-12" @default.
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- W2105758312 title "General algorithms for reduced-adder integer multiplier design" @default.
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- W2105758312 doi "https://doi.org/10.1049/el:19951242" @default.
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