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- W2107702386 abstract "Measured results of V MIN from 20nm SRAM arrays with read and write assist techniques are presented for multiple flavors of bitcell. A novel assist technique is presented, that provides both read and write assist by controlling only the voltage of wordline (WL) and without using a separate supply voltage. The WL-drivers use a WL float technique to reduce the dc-path current compared to existing WL under-drive read assist designs. The assist technique resulted in a V MIN improvement of 143mV for the high-density 6T (6T-HD) SRAM, 96mV for the high-speed 6T (6T-HS) SRAM, and 86mV for the 8T dual-port (DP) SRAM." @default.
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- W2107702386 date "2014-06-01" @default.
- W2107702386 modified "2023-09-26" @default.
- W2107702386 title "Low V<inf>MIN</inf> 20nm embedded SRAM with multi-voltage wordline control based read and write assist techniques" @default.
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- W2107702386 doi "https://doi.org/10.1109/vlsic.2014.6858412" @default.
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