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- W2108254811 abstract "This article presents a current signal sample-and-hold (S/H) circuit using 0.5 mum CMOS technology. A current minimum circuit is used to sample the input signal in place of a sampling switch used in the conventional S/H circuit. The current peak detector is used to the signal from the minimum circuit in the hold state. The proposed configuration is adopted effectively to cancel switch feedthrough error. The performances of the proposed circuit are demonstrated using the PSPICE analog simulation program. Simulation results show the sampling frequency up to 100 MHz and high accuracy." @default.
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- W2108254811 date "2007-01-01" @default.
- W2108254811 modified "2023-09-26" @default.
- W2108254811 title "A current signal CMOS sample-and-hold circuit" @default.
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- W2108254811 doi "https://doi.org/10.1109/iccas.2007.4406902" @default.
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