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- W2109827241 abstract "Until now, a refresh operation, which is necessary in using MOS dynamic RAMs, has made MOS dynamic RAMs more difficult to use compared with static RAMs. On the other hand, with advances in MOS dynamic RAMs, new refresh modes, i.e., automatic and self refresh modes, become available when a spare pin is applied to a refresh control signal. In 64Kbit MOS dynamic RAMs, pin 1 can be such a refresh control terminal if the substrate bias is generated on-chip. Circuit considerations in accommodating the automatic and self refresh modes by pin 1 are discussed, with special attention given to the on-chip refresh address counter and the timer used during the self refresh. A practical 64Kbit MOS dynamic RAM has been realized with the chip area increase of 1.6% and the standby current increase of 0.3 mA as the result of implementing the automatic and self refresh modes." @default.
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- W2109827241 date "1983-01-01" @default.
- W2109827241 modified "2023-09-26" @default.
- W2109827241 title "A 64Kbit MOS dynamic RAM with auto/self refresh functions" @default.
- W2109827241 cites W1989601921 @default.
- W2109827241 doi "https://doi.org/10.1002/ecja.4400660114" @default.
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