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• W2109885924 abstract "Existing shield insertion for multiple signal nets can lead to a nonuniformly distributed, capacitive-coupling length and inductive return paths, introducing large delays and delay variation by crosstalk. This article discusses a twisted, staggered interconnect structure that reduces both inductive and capacitive crosstalk. The proposed design reduces delay by 25% and reduces delay variation by 25× compared to designs employing coplanar shields." @default.
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• W2109885924 date "2009-09-01" @default.
• W2109885924 modified "2023-10-18" @default.
• W2109885924 title "Robust On-Chip Signaling by Staggered and Twisted Bundle" @default.
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• W2109885924 doi "https://doi.org/10.1109/mdt.2009.121" @default.
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