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- W2110156811 abstract "The complexity of the contemporary digital circuits and systems, determines the need for higher specification abstraction and automatic circuit synthesis techniques to be adopted. A prototype high level synthesis framework is presented here, that automatically generates synthesizable RTL code from unaltered, high level programs. The framework is developed using compiler-generator and logic programming (thus formal) techniques, and it utilizes a patented intermediate compilation format to retain the algorithmic semantics of the source programs and allow for compiler transformations. The synthesis framework is evaluated via statistics from a number of real-life applications. The performance optimization of the compiled applications, including an MPEG engine, underlines the quality of the prototype design framework." @default.
- W2110156811 created "2016-06-24" @default.
- W2110156811 creator A5081389746 @default.
- W2110156811 date "2011-04-01" @default.
- W2110156811 modified "2023-10-16" @default.
- W2110156811 title "Formal generation of synthesizable RTL from regular programs" @default.
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- W2110156811 doi "https://doi.org/10.1109/dtis.2011.5941415" @default.
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