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• W2110527999 abstract "As technology scales, the aging effect caused by negative bias temperature instability (NBTI) has become a major reliability concern. In the mean time, reducing leakage power remains to be one of the key design goals. Because both NBTI-induced circuit degradation and standby leakage power have a strong dependency on the input vectors, input vector control (IVC) technique could be adopted to reduce the leakage power and mitigate NBTI-induced degradation. The IVC technique, however, is ineffective for larger circuits. Consequently, in this paper, we propose two gate replacement algorithms [direct gate replacement (DGR) algorithm and divide and conquer-based gate replacement (DCBGR) algorithm], together with optimal input vector selection, to simultaneously reduce the leakage power and mitigate NBTI-induced degradation. Our experimental results on 23 benchmark circuits reveal the following. 1) Both DGR and DCBGR algorithms outperform pure IVC technique by 15%–30% with 5% delay relaxation for three different design goals: leakage power reduction only, NBTI mitigation only, and leakage/NBTI cooptimization. 2) The DCBGR algorithm leads to better optimization results and save on average more than 10 <formula formulatype=inline xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex Notation=TeX>$times$</tex></formula> runtime compared to the DGR algorithm. 3) The area overhead for leakage reduction is much more than that for NBTI mitigation." @default.
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• W2110527999 date "2011-04-01" @default.
• W2110527999 modified "2023-09-25" @default.
• W2110527999 title "Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques" @default.
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• W2110527999 doi "https://doi.org/10.1109/tvlsi.2009.2037637" @default.
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