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- W2111279896 abstract "The purpose of this paper is to show that multi-threading techniques can be applied to a vector processor to greatly increase processor throughput and maximize resource utilization. Using a trace driven approach, we simulate a selection of the Perfect Club and Specfp92 programs and compare their execution time on a conventional vector architecture with a single memory port and on a multithreaded vector architecture. We devote an important part of this paper to study the interaction between multi-threading and main memory latency. This paper focuses on maximizing the usage of the memory port, the most expensive resource is typical vector computers. A study of the cost associated with the duplication of the vector register file is also carried out. Overall, multithreading provides for this architecture a performance advantage of more than a factor of 1.4 for realistic memory latencies, and can drive the utilization of the single memory port as high as 95%." @default.
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- W2111279896 date "2002-11-22" @default.
- W2111279896 modified "2023-10-18" @default.
- W2111279896 title "Multithreaded vector architectures" @default.
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- W2111279896 doi "https://doi.org/10.1109/hpca.1997.569677" @default.
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