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• W2111383863 abstract "A sorter-based processor architecture is introduced for digital signal processing purposes. The processor has been optimized to implement sliding average-type linear structures and three- and five-sample sorting operations. The specialized processor can be used, for example, for the several variations of the finite-impulse-response (FIR) median hybrid (FMH) filters, as well as other types of ranked-order filters and running-sum averaging operations. FMH filters with averaging substructures and window lengths of up to 65 samples can be computed with sampling intervals of less than 20 clock cycles. The 12-bit microprogrammable core processor is designed as a full-custom very large scale integration (VLSI) circuit. Examples of filter implementations show that the sorter-based processor architecture is suitable for several kinds of digital signal processing tasks.< <ETX xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>></ETX>" @default.
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• W2111383863 date "1989-01-01" @default.
• W2111383863 modified "2023-10-14" @default.
• W2111383863 title "A signal processor for median-based algorithms" @default.
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• W2111383863 doi "https://doi.org/10.1109/29.31294" @default.
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