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- W2111599960 abstract "This paper presents a realizable RLMC reduction algorithm for extracted interconnect circuits based on two effective approaches: RL branch reduction and RC/LC node reduction. Our algorithm takes advantage of some structures existing extensively in interconnect circuits and hence has extremely fast execution time. It takes about 8 seconds to reduce a circuit of over 300,000 elements while maintaining 3% error and 75% element reduction ratio." @default.
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- W2111599960 date "2004-02-16" @default.
- W2111599960 modified "2023-09-26" @default.
- W2111599960 title "Realizable reduction for electromagnetically coupled RLMC interconnects" @default.
- W2111599960 doi "https://doi.org/10.5555/968879.969187" @default.
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