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• W2112381875 abstract "Dual-V th design is an effective leakage power reduction technique at behavioral synthesis level. It allows designers to replace modules on non-critical path with the high-V th implementation. However, the existing constructive algorithms fail to find the optimal solution due to the complexity of the problem and do not consider the on-chip temperature variation. In this paper, we propose a two-stage thermal-dependent leakage power minimization algorithm by using dual-V th library during behavioral synthesis. In the first stage, we quantitatively evaluate the timing impact on other modules caused by replacing certain modules with high V th . Based on this analysis and the characteristics of the dual-V th module library, we generate a small set of candidate solutions for the module replacement. Then in the second stage, we obtain the on-chip thermal information from thermal-aware floorplanning and thermal analysis to select the final solution from the candidate set. Experimental results show an average of 17.8% saving in leakage power consumption and a slightly shorter runtime compared to the best known work. In most cases, our algorithm can actually find the optimal solutions obtained from a complete solution space exploration." @default.
• W2112381875 created "2016-06-24" @default.
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• W2112381875 date "2010-03-08" @default.
• W2112381875 modified "2023-09-26" @default.
• W2112381875 title "Behavioral level dual-v th design for reduced leakage power with thermal awareness" @default.
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• W2112381875 doi "https://doi.org/10.5555/1870926.1871229" @default.
• W2112381875 hasPublicationYear "2010" @default.
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