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- W2112791851 abstract "Analytical noise modeling of the bit line coupling analysis for various DRAM architectures has been developed. Intrabit and interbit line coupling for true folded, interdigitated, and twisted architectures are analyzed. Analytical equations for the noise-to-signal ratio are derived based on the charge conservation and the current continuity equations. The time-dependent differential equations for twisted architectures are presented. The analytical expressions provide insight into the charge redistribution when the word lines turn on. The topology for array noise extraction in SPICE circuit simulation is presented. SPICE simulations are found to be in good agreement with the analytical results. >" @default.
- W2112791851 created "2016-06-24" @default.
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- W2112791851 date "2002-12-04" @default.
- W2112791851 modified "2023-09-27" @default.
- W2112791851 title "Interconnect noise analysis for megabit DRAMs" @default.
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- W2112791851 doi "https://doi.org/10.1109/vmic.1990.127867" @default.
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