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- W2113103672 abstract "In this paper, we present a methodology for rapid prototyping of wireless sensor networks that allows to embed sophisticated debugging functionality in a mote prototype and thereby monitor entire networks. We achieve this goal by combining two fundamental concepts: the use of a re-configurable sensor node prototype platform, and an auxiliary network structure for granting a reliable communication channel for runtime debugging without interfering with the primary radio link. For the prototype platform, we propose a modular design which incorporates a single FPGA with high gate count as core of the platform. The FPGA is utilized to emulate arbitrary mote architectures and realize flexible interfaces to sensors and radio transceivers. As a major benefit, versatile debugging interfaces can additionally be implemented in the same FPGA, seamlessly integrating into the emulated mote architecture, with direct access to internal information. This easily allows to realize passive system monitors as well as active debugging control. By using a deployment support network to exchange relevant information, all motes can be monitored and controlled simultaneously by a user. The paper presents the proposed methodology, its implementation, and a practical application example in detail." @default.
- W2113103672 created "2016-06-24" @default.
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- W2113103672 date "2008-06-01" @default.
- W2113103672 modified "2023-10-03" @default.
- W2113103672 title "A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support" @default.
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- W2113103672 doi "https://doi.org/10.1109/rsp.2008.13" @default.
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