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- W2113128610 abstract "This paper presents the design and the measurement results of a 3-5-GHz down-converter fabricated in a 90-nm CMOS technology. The circuit consists of a single-ended resistive-feedback low-noise amplifier and two I/Q double-balanced mixers. A transformer-based on-chip single-ended-to-differential conversion allows gain and noise performance to be optimized at a very-low power. A post-layout stability analysis on the LNA is also reported, giving the guidelines to avoid possible oscillations introduced by the single-ended LNA. The down-converter achieves a 23-dB conversion gain, a noise figure of 3.4 dB, and an input third-order intercept point of -8 dBm, while drawing only 9 mA from a 1.2-V supply voltage." @default.
- W2113128610 created "2016-06-24" @default.
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- W2113128610 date "2008-10-01" @default.
- W2113128610 modified "2023-10-05" @default.
- W2113128610 title "A Low-Power 3-5-GHz UWB Down-Converter with Resistive-Feedback LNA in a 90-nm CMOS Process" @default.
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- W2113128610 doi "https://doi.org/10.1109/emicc.2008.4772315" @default.
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