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• W2113233539 abstract "System-on-a-chip (SoC) applications require multiple power supply voltages with the features of low noise for analog circuits and high efficiency for digital circuits. Thus, this paper proposes the priority-scheduled program (PSP) for the single-inductor quad-output (SIQO) switching converter. This technique manages energy delivery to multiple outputs, facilitates fast transient response, and reduces cross-regulation simultaneously. Moreover, a level bypass detector (LBD) is used to overcome the limitation of significant loading differences among quad outputs in conventional designs because the PSP technique cantransfer additional energy to low-priority outputs to avoid overshoot voltage at high-priority outputs. Furthermore, voltage disturbance can be filtered out using two additional low-dropout regulators that operate as buffers cascaded at two low-priority outputs. Therefore, the SIQO converter that is fabricated in 40 nm CMOS technology satisfies the power requirements in portable electronics given its low cross-regulation of 0.2%, fast transient response of 15 μs, and an output voltage ripple that is smaller than 30 mV." @default.
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• W2113233539 date "2015-07-01" @default.
• W2113233539 modified "2023-10-02" @default.
• W2113233539 title "Single-Inductor Quad-Output Switching Converter With Priority-Scheduled Program for Fast Transient Response and Unlimited Load Range in 40 nm CMOS Technology" @default.
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• W2113233539 doi "https://doi.org/10.1109/jssc.2015.2422071" @default.
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