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- W2113677233 abstract "This paper proposes enhancements to SAT-based property checking with the goal to increase the spectrum of applications where a proof of unbounded validity of a safety property can be provided. For this purpose, invariants are computed by reachability analysis on an abstract model. The main idea of the paper consists in a BDD-based analysis of k-step-induction on the abstract model and its use to guide a step-wise refinement process of the initial abstraction. The property is then proven on a bounded model of the original design using the computed invariant. The new approach has been applied to formally verify industrial SoC modules. In our experiments, we consider particularly difficult verification tasks occurring in the context of protocol compliance verification using generic, transaction-style verification IPs. In our experiments, numerous properties are proven which either required substantial manual interaction in previous approaches, or cannot be proven at all by other methods available to us." @default.
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- W2113677233 date "2010-06-13" @default.
- W2113677233 modified "2023-09-27" @default.
- W2113677233 title "Analyzing <i>k</i> -step induction to compute invariants for SAT-based property checking" @default.
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- W2113677233 doi "https://doi.org/10.1145/1837274.1837319" @default.
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