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• W2115988058 abstract "We present the measurements of matching and high count rate performance of a 64 channel readout ASIC called DEDIX for high count rate position-sensitive measurements using semiconductor detectors. The ASIC is designed in 0.35 mum CMOS process and its total area is 3900 times 5000 mum <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> . The DEDIX has a binary readout architecture. Each channel is built of a charge sensitive amplifier (CSA) with a pole-zero cancellation circuit, a shaper, two independent discriminators and two independent 20-bit counters. The size of the input device in CSA has been optimized for a detector capacitance in the range of 1-3 pF per strip. An equivalent noise charge of 110 el rms has been achieved for a total detector capacitance of 1 pF at the shaper peaking time of 160 ns. Internal correction DAC implemented in each channel independently ensures a low spread of discriminator effective threshold, namely 0.4 mV at one sigma level. The mean gain in the multichannel ASIC is 54 muV/el, with a good uniformity from channel-to-channel (sd/mean ap 0.8%). Low noise performance and high rate capability have been demonstrated by the measurement up to and above 1 MHz average rate of input signals." @default.
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• W2115988058 date "2007-08-01" @default.
• W2115988058 modified "2023-10-03" @default.
• W2115988058 title "Measurements of Matching and High Count Rate Performance of Multichannel ASIC for Digital X-Ray Imaging Systems" @default.
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• W2115988058 doi "https://doi.org/10.1109/tns.2007.903176" @default.
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