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- W2116550486 abstract "The paper presents hardware implementation of the MPEG-7 edge histogram descriptor. The testing circuit was described using VHDL language and synthesized into FPGA. The RC1000 board with a Xilinx Virtex V1000 FPGA was chosen as the target platform. Experimental results of the descriptor efficiency are presented too" @default.
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- W2116550486 date "2006-10-24" @default.
- W2116550486 modified "2023-10-17" @default.
- W2116550486 title "Hardware Realization Of The MPEG-7 Edge Histogram Descriptor" @default.
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- W2116550486 doi "https://doi.org/10.1109/mixdes.2006.1706669" @default.
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