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- W2117043747 abstract "In this paper, a novel low specific onresistance SOI LDMOS Device with P<SUP>+</SUP>P-top layer in the drift region is proposed and investigated using a two dimensional device simulator, MEDICI. The structure is characterized by a heavily-doped P<SUP>+</SUP> region which is connected to the P-top layer in the drift region. The P<SUP>+</SUP> region can modulates the surface electric field profile, increases the drift doping concentration and reduces the sensitivity of the breakdown voltage on the geometry parameters. Compared to the conventional D-RESURF device, a 25.8% decrease in specific on-resistance and a 48.2% increase in figure of merit can be obtained in the novel device. Furthermore, the novel P<SUP>+</SUP>P-top device also present cost efficiency due to the fact that the P<SUP>+</SUP> region can be fabricated together with the P-type body contact region without any additional mask." @default.
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- W2117043747 date "2014-10-30" @default.
- W2117043747 modified "2023-09-26" @default.
- W2117043747 title "Low Specific On-resistance SOI LDMOS Device with P+P-top Layer in the Drift Region" @default.
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- W2117043747 doi "https://doi.org/10.5573/jsts.2014.14.5.673" @default.
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