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- W2117316008 abstract "This paper discusses the NP-complete problem of reconfiguring a two-dimensional degradable VLSI/WSI array under the row and column routing constraints. A new strategy for row selection in the logical array is proposed and the earlier approach by Low et. al. is simplified. A flaw in Low's algorithm is also addressed. Experimental results show that our algorithm is approximately 50% faster than the most efficient algorithm, cited in the literature, without loss of performance." @default.
- W2117316008 created "2016-06-24" @default.
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- W2117316008 date "2003-08-27" @default.
- W2117316008 modified "2023-09-26" @default.
- W2117316008 title "A run-time reconfiguration algorithm for VLSI arrays" @default.
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- W2117316008 doi "https://doi.org/10.1109/icvd.2003.1183194" @default.
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