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- W2118986737 abstract "System level design is increasingly turning towards FPGAs to take advantage of their low cost and fast prototyping. In this paper we present a timing driven partitioning approach for an architecturally constrained multi-FPGA system. The partitioning approach uses path-based clustering based on the work by Dennis et al. (1995) and retiming. The board-level architecture is based on the PCB model consisting of four Xilinx 4013 FPGAs. The proposed algorithm has been tested on large scale real designs." @default.
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- W2118986737 date "2002-11-27" @default.
- W2118986737 modified "2023-10-16" @default.
- W2118986737 title "Timing driven multi-FPGA board partitioning" @default.
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- W2118986737 doi "https://doi.org/10.1109/icvd.1998.646609" @default.
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