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- W2120661608 abstract "This paper has been the analysis of passive devices in Si RF and microwave. Multilevel monolithic 3D inductors implemented in a standard CMOS technology are presented. Since on-chip inductors are constrained to be planar, the typical solution is to form a spiral. Proposed inductors are composed of 3D structures requiring no extra processing steps. Inductances are higher in increasing the mutual inductance besides the self-inductance. In this reason, this structure gives rise to a quality factor Q and a inductance using 3D geometry in small areas." @default.
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- W2120661608 date "2002-11-13" @default.
- W2120661608 modified "2023-09-26" @default.
- W2120661608 title "Multilevel monolithic 3D inductors on silicon" @default.
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- W2120661608 doi "https://doi.org/10.1109/mwscas.2001.986321" @default.
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