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- W2121593431 abstract "Class AB amplifier stages are commonly used to conserve power in radio transmitters. In this paper, a Class AB amplifier stage is investigated for use in radio receivers to reduce power consumption. In this, a novel superlinear three-terminal transistor consisting of an NMOS transistor in parallel with a PMOS transistor is used to improve Class AB linearity to a level approaching Class A performance. Optimum transistor bias conditions for the linearized Class AB receiver stage are also presented. Measured and simulated results at 1 GHz show supply current reduction of approximately 40 percent and 4 dB improvement in third order intercept point using linearization. Finally, simulations of an improved Class AB design show third order output intercept better than a corresponding Class A stage and show more than 50 percent reduction in power consumption." @default.
- W2121593431 created "2016-06-24" @default.
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- W2121593431 date "2007-01-01" @default.
- W2121593431 modified "2023-09-26" @default.
- W2121593431 title "Reduced current class AB radio receiver stages using novel superlinear transistors with parallel NMOS and PMOS transistors at one GHz" @default.
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- W2121593431 doi "https://doi.org/10.1109/secon.2007.342852" @default.
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