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• W2121923446 abstract "This paper presents an analog-to-digital converter using state-of-the-art techniques in 180nm process. Making use of charge sharing, asynchronous logic circuitry, scaled digital voltage supply and a novel sampling scheme, this ADC achieves a figure of merit (FOM) of 45fJ per conversion step in simulations. This FOM is close to reference designs reported in 90nm." @default.
• W2121923446 created "2016-06-24" @default.
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• W2121923446 creator A5004862330 @default.
• W2121923446 date "2010-12-01" @default.
• W2121923446 modified "2023-09-25" @default.
• W2121923446 title "An energy-efficient successive approximation register analog to digital converter in 180nm" @default.
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• W2121923446 doi "https://doi.org/10.1109/apccas.2010.5774967" @default.
• W2121923446 hasPublicationYear "2010" @default.
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