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- W2121980572 abstract "This paper presents a low-noise low-power amplifier for implantable device for neural signal acquisition. By operating MOS transistors in the subthreshold region, smaller low-frequency noise and lower power consumption can be achieved. A low power, low-noise common-drain buffer and a low-noise, high-linearity, low pass filter are used for high frequency noise filtering. Post-layout simulation shows the input referred noise of the system is 2.19 muVrms from 10 Hz to 10 KHz, power consumption is 55.8 muW, and the NEF is 2.53. The amplifier was fabricated using a T SMC 0.18 mum 1P6M CMOS process. Simulation results show that this low-noise, low-power amplifier is suitable for implantable device applications." @default.
- W2121980572 created "2016-06-24" @default.
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- W2121980572 date "2009-09-01" @default.
- W2121980572 modified "2023-10-16" @default.
- W2121980572 title "A low-noise low-power amplifier for implantable device for neural signal acquisition" @default.
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- W2121980572 doi "https://doi.org/10.1109/iembs.2009.5335204" @default.
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