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- W2122861118 abstract "Sub-threshold leakage has increased dramatically with technology scaling, and it already consumes a significant portion of the total power budget in current high-end chip designs. This paper presents a state-of-the-art overview of the power gating techniques that promise to reduce sub-threshold leakage power by up to three orders of magnitude. By emphasizing the challenges and up-to-date solutions, this paper provides an in-depth vision of the current status of power-gating techniques. By analyzing the historic development of power-gating, this paper also outlines possible future evolution courses of the technique." @default.
- W2122861118 created "2016-06-24" @default.
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- W2122861118 date "2006-12-01" @default.
- W2122861118 modified "2023-09-24" @default.
- W2122861118 title "Techniques of Power-gating to Kill Sub-Threshold Leakage" @default.
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- W2122861118 doi "https://doi.org/10.1109/apccas.2006.342219" @default.
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