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- W2123779085 abstract "Behavioural models selected from a predefined library are automatically calibrated against transistor-level blocks from a Gigahertz-range PLL undergoing verification. The calibrated behavioural models simulate at 10 to 200 times the speed of the target blocks, with insignificant loss of accuracy. The technique shrinks the overall simulation time of the assembled PLL by a factor of 120. We rely on a set of carefully qualified, detailed behavioural models, written in VHDL-AMS, each with a custom calibration plan." @default.
- W2123779085 created "2016-06-24" @default.
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- W2123779085 date "2003-12-22" @default.
- W2123779085 modified "2023-09-25" @default.
- W2123779085 title "Automatic behavioural model calibration for efficient PLL system verification" @default.
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- W2123779085 doi "https://doi.org/10.1109/date.2003.1186709" @default.
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