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- W2124339920 abstract "An analog-to-digital interface IC suitable for PRML read channels with a 100 MHz output rate has been designed and fabricated in a 1.2 /spl mu/m CMOS technology. The prototype IC contains a low-pass filter, symbol-rate equalizer, analog-to-digital converter, and generates all required clocks from a single external reference clock. The filters are implemented using a switched-capacitor parallel filter architecture used to implement a 3:1 decimation filter and a 3-tap programmable equalizer.< <ETX xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>></ETX>" @default.
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- W2124339920 date "1994-01-01" @default.
- W2124339920 modified "2023-10-15" @default.
- W2124339920 title "A 100 MHz A/D interface for PRML magnetic disk read channels" @default.
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- W2124339920 doi "https://doi.org/10.1109/4.340438" @default.
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