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- W2125103619 abstract "Due to large mismatch in coefficients of thermal expansion between the copper via and the silicon of Through Silicon Via(TSV), significant thermal stresses will be induced at the interfaces of copper/dielectric layer (usually SiO <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</inf> ) and dielectric layer/silicon when TSV structure is subjected to subsequent temperature loadings, which would influence the reliability and the electrical performance of interconnects. As a solution, a modified through silicon via was proposed. The thin SiO2 dielectric layer is replaced by a thick polymer isolation layer. Conformal copper plating is used to realize the connection and the remaining hole in the copper via is filled with polymer material. In this work, thermo-mechanical finite element method (FEM) was used to simulate copper filled and polymer filled TSV structures in order to analyze the thermo-mechanical behavior subjected to a load of temperature cycling. Several configurations were studied, including diameter of the copper via and polymer filled via, the aspect ratio H/D, the thickness of parylene dielectric layer. Different selections of filling on the copper via such as polyimide, BCB, epoxy and underfill (FP4256) were compared with the calculation results. The modeling results show that thermal stresses and the risk of failure in the through silicon via can be significantly reduced by use of a soft dielectric layer and polymer filled material." @default.
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- W2125103619 date "2009-05-01" @default.
- W2125103619 modified "2023-10-16" @default.
- W2125103619 title "Thermo-mechanical characterization of copper filled and polymer filled tsvs considering nonlinear material behaviors" @default.
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- W2125103619 doi "https://doi.org/10.1109/ectc.2009.5074192" @default.
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