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• W2125228547 abstract "The 800MHz System-on-Chip implements the C64x VLIW DSP VelociTI.2/spl trade/ Architecture and delivers 6400 MIPS, 3200 16-bit MMACs, 6400 8-bit MMACs at 0.17 mW/MMAC (8 bit). The chip is implemented in state of the art 90 nm CMOS technology with 7-layer copper metalization. The core dissipates 1080 mW at 800 MHz, 1.2V. The system-on-chip is targeted for high performance wireless infrastructure application. It has an 8-way VLIW DSP core, a 2-level memory system, and an I/O bandwidth of 3.2GB/s." @default.
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• W2125228547 date "2004-06-21" @default.
• W2125228547 modified "2023-09-27" @default.
• W2125228547 title "A 800 MHz system-on-chip for wireless infrastructure applications" @default.
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• W2125228547 doi "https://doi.org/10.1109/icvd.2004.1260953" @default.
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