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- W2126585198 abstract "A new logic synthesis algorithm for reducing the delay time with the least increase of gate is presented. This algorithm uses a linear programming approach and makes it possible for delay and gate optimization to be achieved simultaneously from the global point of view. Therefore, this new algorithm prevents the generation of redundant logic arising from the delay time improvement, which is a weakness of the conventional method. >" @default.
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- W2126585198 date "1990-01-01" @default.
- W2126585198 modified "2023-09-25" @default.
- W2126585198 title "Logic optimization algorithm by linear programming approach" @default.
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- W2126585198 doi "https://doi.org/10.1145/123186.123299" @default.
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