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- W2126604927 abstract "In this paper, we present our InP DHBT technology with improved performances, yield and uniformity; and some new design tools, both of which have allowed us to achieve 40+ Gbit/s full-rate-clock circuits, such as the D-flip-flop. These circuits have been characterized and packaged." @default.
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- W2126604927 date "2003-06-25" @default.
- W2126604927 modified "2023-09-25" @default.
- W2126604927 title "InP DHBT technology and design for 40 Gbit/s full-rate-clock communication circuits" @default.
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- W2126604927 doi "https://doi.org/10.1109/gaas.2002.1049063" @default.
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