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- W2127571152 abstract "The availability of low-cost, high-performance, general-purpose parallel machines has made parallel processing viable for the development of CAD (computer-aided design) applications. The authors identify the key issues that surface when an attempt is made to parallelize the test-generation process. They illustrate how different test-generation strategies can be mapped onto different classes of parallel machines, including loosely coupled distributed systems, distributed-memory systems with message-passing architectures, and tightly coupled multiprocessor systems with shared global memory. Parallel test generation using a single heuristic and using multiple heuristics is considered. The performance of these mapping strategies is predicted by using uniprocessor turnaround times and an estimate of the communication delays. >" @default.
- W2127571152 created "2016-06-24" @default.
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- W2127571152 date "2003-01-06" @default.
- W2127571152 modified "2023-09-26" @default.
- W2127571152 title "Test generation in a parallel processing environment" @default.
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- W2127571152 doi "https://doi.org/10.1109/iccd.1988.25649" @default.
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