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- W2128337944 abstract "New 3D technology, called Monolithic Integration, offers very dense 3D interconnect capabilities. In this paper, we propose a 3D FPGA architecture with logic-on-memory approach based on this technology. The routing and computation blocks are splitted into two layers where the logic is placed on the top and memory on the bottom. Using extracted values from layout in 14nm FDSOI technology, typical benchmark circuits are evaluated in the VPR5 toolflow. The results show an area reduction of 55% compared to the 2D FPGA. More importantly, due to the lowered routing congestion, the EDP of the 3D FPGA is improved by 47%." @default.
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- W2128337944 date "2014-03-24" @default.
- W2128337944 modified "2023-09-24" @default.
- W2128337944 title "3D FPGA using high-density interconnect monolithic integration" @default.
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- W2128337944 doi "https://doi.org/10.5555/2616606.2617086" @default.
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