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- W2128803302 abstract "Load flow and optimal power flow (OPF) constitute core computations used in energy market operation. We considered different design partitions of computational tasks for a desktop computer equipped with field programmable gate array (FPGA). Load flow and OPF require lower-upper triangular matrix decomposition (LU). The number of clock cycles required for data transfer and floating-point operations were used as performance measures in determining optimal hardware/software partitions for each problem. Optimal partition performance is achieved by assigning the lower-upper triangular decomposition (LU) and matrix multiplication operations to custom hardware cores. A comparison between the proposed partition and software implemented using a state-of-the-art sparse matrix package running on a 3.2 GHz Pentium 4 shows a six-fold speedup" @default.
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- W2128803302 date "2006-01-01" @default.
- W2128803302 modified "2023-09-27" @default.
- W2128803302 title "Optimal reconfigurable HW/SW co-design of load flow and optimal power flow computation" @default.
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- W2128803302 doi "https://doi.org/10.1109/pes.2006.1709358" @default.
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