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- W2129547250 abstract "Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabricated, but do not operate as expected. Providing a means to effectively debug these integrated circuits is vital to help pin-point problems and reduce the number of re-spins required to create a correctly-functioning chip. In this paper, we show that programmable logic cores (PLCs) and flexible networks can provide this debugging capability. We present an architecture and example implementation. We show that the area overhead of this proposed architecture would be well below 10% for many target ICs." @default.
- W2129547250 created "2016-06-24" @default.
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- W2129547250 date "2006-01-18" @default.
- W2129547250 modified "2023-10-16" @default.
- W2129547250 title "Post-silicon debug using programmable logic cores" @default.
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- W2129547250 doi "https://doi.org/10.1109/fpt.2005.1568553" @default.
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