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- W2130223274 abstract "A new method to implement high performance and low power quaternary circuits using multi-threshold transistors and 3 power supply lines is presented in this work. Some specific basic gates like inverter, NMIN and NMAX circuits are presented together with a look-up table that can be used to perform any logic function. These basic circuits are used to implement arithmetic circuits. A quaternary full adder is demonstrated and compared to equivalent binary circuit showing higher speed, low consumption with a low area overhead. The circuits were simulated with the Spice tool using TSMC 0.18μm technology." @default.
- W2130223274 created "2016-06-24" @default.
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- W2130223274 date "2006-08-28" @default.
- W2130223274 modified "2023-09-26" @default.
- W2130223274 title "A cell library for low power high performance CMOS voltage-mode quaternary logic" @default.
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- W2130223274 doi "https://doi.org/10.1145/1150343.1150388" @default.
- W2130223274 hasPublicationYear "2006" @default.
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