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- W2130257290 abstract "This paper presents a new VLSI architecture for ANNs based on the combination of digital signalling and analog computing. It achieves a high level of parallelism as well as efficient area and power usage making very large networks possible. An implementation is presented combining 33k synapses and 256 neurons on 9 mm/sup 2/ of silicon area." @default.
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- W2130257290 date "2003-06-25" @default.
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- W2130257290 title "An integrated mixed-mode neural network architecture for megasynapse ANNs" @default.
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- W2130257290 doi "https://doi.org/10.1109/ijcnn.2002.1007574" @default.
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